Jean-Michel Gorius

Jean-Michel is a Ph.D. student at the University of Rennes 1. He is working at the Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA) in the TARAN team lead by Olivier Sentieys. His Ph.D. revolves around the High-Level Synthesis of Instruction Set Processors and is supervised by Steven Derrien (UR1) and Simon Rokicki (ENS Rennes). He received his bachelor’s and master’s degrees from the University of Rennes 1, and his magister’s degree from ENS Rennes.

Jean-Michel’s research interests range from hardware design and hardware synthesis to compilation and high-performance applications. He led the initial development of a compiler intermediate representation for stencils based on MLIR at ETH Zürich under the supervision of Tobias Grosser. As part of this project, he has been working in close collaboration with ETH Zürich, CSCS, MeteoSwiss and Vulcan Inc.

Besides computer science, Jean-Michel enjoys playing the piano, riding his bike and hiking.

Download Resume (PDF)

Publications

2022

Design Exploration of RISC-V Soft-Cores through Speculative High-Level Synthesis

ICFPT'22

Jean-Michel Gorius, Simon Rokicki, Steven Derrien
Link, PDF

2022

SpecHLS: Speculative Accelerator Design using High-Level Synthesis

IEEE Micro

Jean-Michel Gorius, Simon Rokicki, Steven Derrien
Link, PDF


Service

March 2022

CC'22 Artifact Evaluation Committee


Research

March 2023

ARCHI'23 Spring School

Col de Porte, Sarcenas, France

Thematic school on computer architecture, embedded systems and hardware design.
More information available here.

September 2021 – Present

Ph.D. in Computer Science

IRISA, Rennes, France

High-Level Synthesis of Instruction Set Processors
Supervisors: Steven Derrien, Simon Rokicki

February 2021 – July 2021

Research Internship

IRISA, Rennes, France

Speculative High-Level Synthesis of Instruction Set Processors
Supervisors: Steven Derrien, Simon Rokicki
Report, Slides
Bibliographic report, Bibliographic slides

July 2020

ACACES 2020 Summer School

Online

Working with RISC-V: from open ISA to open Architecture to open Hardware
Software-level Attacks on Architectural and Microarchitectural State

February 2020 – July 2020

Research Internship

University of Murcia, Murcia, Spain

Static Memory Dependence Analysis for Hardware Optimizations
Supervisors: Alexandra Jimborean, Alberto Ros
Report

14 November 2019

SIG MLIR Open Design Meeting

Online Presentation

A Compiler Intermediate Representation for Stencils
SIG MLIR Agenda, Slides and Recording

21 October 2019

Workshop on MLIR for HPC

Georgia Institute of Technology, Atlanta, GA

Accelerating Climate Modeling: GPU Mapping for Stencil Graphs
Workshop homepage, Slides

September 2019 – December 2019

Research Internship

ETH Zürich, Zürich, Switzerland

Efficient GPU Computations of a Parallel Model for Stencils
Supervisor: Tobias Grosser
Report
Follow-up paper by Gysi et al.

May 2019 – July 2019

Summer Research Internship

ETH Zürich, Zürich, Switzerland

Modeling Stencils in a Multi-Level Intermediate Representation
Supervisor: Tobias Grosser
Report and slides

May 2018 – August 2018

Summer Research Internship

IRISA, Rennes, France

Design Space Exploration for Communication Synthesis on Heterogeneous Multi-Core Platforms
Supervisor: Steven Derrien
Report and slides (in French)

2018

XTRA 2018 Conference

ENS Rennes, Bruz, France

Dynamic Re-Vectorization of Binary Code
Conference mockup designed for a course at the École normale supérieure de Rennes.
Supervised by Erven Rohou, best paper distinction, member of the program committee.


Teaching

September 2021 – August 2022

Teaching Assistant

ENS Rennes, Bruz, France

Agrégation d’informatique

September 2021 – December 2021

Teaching Assistant

ENS Rennes, Bruz, France

Compilation, with Pr. Olivier Ridoux, University of Rennes 1

September 2020 – December 2020

Teaching Assistant

ENS Rennes, Bruz, France

Compilation, with Pr. Olivier Ridoux, University of Rennes 1


Studies

September 2017 – August 2021

Magister's Degree

ENS Rennes, Bruz, France

Research-oriented curriculum.
Class representative.

September 2018 – August 2021

Master's Degree

ENS Rennes, Bruz, France

Computer Science Research (SIF) curriculum.
Class representative.

September 2017 – August 2018

Bachelor's Degree

University of Rennes 1, Rennes, France

Computer Science Research (SIF) curriculum.
Class representative.

September 2015 – August 2017

MPSI/MP Preparatory Classes

Lycée Jean Moulin, Forbach, France

Intensive maths, physics and computer science classes.
Valedictorian.

June 2015

Baccalaureate

Lycée Henri Nominé, Sarreguemines, France

Scientific major with mechanics, electronics and mathematics specialization.
Valedictorian, Summa cum laude distinction.


Projects

LLVM Compiler Infrastructure

Contributor

Github project page

Multi-Level Intermediate Representation (MLIR)

Contributor

Github project page

MLIR Standalone Dialect Template

Author

Github project page

ENS Rennes Beamer Theme

Author

Gitlab project page


Other Projects

January 2021 – August 2021

Musical "Règlement de Contes"

Muses et Co., Rennes, France

Member of the administrative team, treasurer, technical advisor, support team.

June 2019 – May 2020

Musical "L'Ile au Trésor"

Muses et Co., Rennes, France

Support team, composer and music arranger.

March 2019

Inter'ENS Culturelles

ENS Rennes, Bruz, France

Member of the organizing committee, technical team lead, treasurer, sponsoring team.

June 2018 – May 2019

Musical "Une Odyssée"

Muses et Co., Rennes, France

Member of the administrative team, treasurer, main technical advisor, music advisor.

October 2017 – May 2018

Musical "Alice aux Pays des Merveilles"

Muses et Co., Rennes, France

Main technical advisor.


Languages

French

Native language

German

Mother language

English

Fluent, TOEIC: 990

Spanish

Beginner